Microchip Technology /ATSAML11D16A /OSCCTRL /INTENSET

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Interpret as INTENSET

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XOSCRDY)XOSCRDY 0 (XOSCFAIL)XOSCFAIL 0 (OSC16MRDY)OSC16MRDY 0 (DFLLULPRDY)DFLLULPRDY 0 (DFLLULPLOCK)DFLLULPLOCK 0 (DFLLULPNOLOCK)DFLLULPNOLOCK 0 (DPLLLCKR)DPLLLCKR 0 (DPLLLCKF)DPLLLCKF 0 (DPLLLTO)DPLLLTO 0 (DPLLLDRTO)DPLLLDRTO

Description

Interrupt Enable Set

Fields

XOSCRDY

XOSC Ready Interrupt Enable

XOSCFAIL

XOSC Clock Failure Detector Interrupt Enable

OSC16MRDY

OSC16M Ready Interrupt Enable

DFLLULPRDY

DFLLULP Ready interrupt Enable

DFLLULPLOCK

DFLLULP Lock Interrupt Enable

DFLLULPNOLOCK

DFLLULP No Lock Interrupt Enable

DPLLLCKR

DPLL Lock Rise Interrupt Enable

DPLLLCKF

DPLL Lock Fall Interrupt Enable

DPLLLTO

DPLL Lock Timeout Interrupt Enable

DPLLLDRTO

DPLL Loop Divider Ratio Update Complete Interrupt Enable

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